Research into next-generation nonvolatile memory devices having lower power consumption and higher integration compared to a flash memory device is underway. As examples of such next-generation nonvolatile memory devices, there are phase change memory (PRAM) using phase change in a phase change material such as a chalcogenide alloy, Magnetic RAM (MRAM) using resistance change of a Magnetic Tunnel Junction (MTJ) dependent upon magnetization state of a ferromagnetic material, ferroelectric RAM using polarization of a ferroelectric material, resistive RAM (ReRAM) using resistance change of a variable resistance material, and the like.
As an example of a magnetic memory, there is a Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) device capable of inverting magnetization using Spin-Transfer Torque (STT) due to electron injection and discriminating a resistance difference between before and after the magnetization inversion. Such an STT-MRAM device includes a pinned layer and a free layer, each of which is formed of a ferromagnetic material, and an MTJ formed with a tunnel barrier therebetween. This MTJ has a low resistance state due to easy current flow when the magnetization directions of a free layer and a pinned layer are the same (i.e., parallel). On the other hand, when the magnetization directions are different (i.e., anti-parallel), a high resistance state is exhibited due to current decrease. In addition, since a magnetization direction of an MTJ should change only in a direction perpendicular to a substrate, a free layer and a pinned layer should have a perpendicular magnetization value. When a perpendicular magnetization value is symmetrical with respect to 0 according to the intensity and direction of the magnetic field and clear squareness (S) is exhibited (S=1), Perpendicular Magnetic Anisotropy (PMA) may be considered superior. Such an STT-MRAM device is theoretically capable of 1015 cycles or more and is capable of switching at a rate as high as nanoseconds (ns). In particular, a perpendicular magnetization type STT-MRAM device does not have a scaling limit in theory and has an advantage in that driving current density may be lowered as scaling progresses. Accordingly, research into such a perpendicular magnetization type STT-MRAM device, as a next generation memory device capable of substituting for a DRAM device, is actively underway. Meanwhile, an example of such an STT-MRAM device has been proposed in Korean Patent No. 10-1040163.
In addition, with regard to an STT-MRAM device, a seed layer is formed on a lower part of a free layer, a capping layer is formed on an upper part of a pinned layer, and a synthethic antiferromagnetic (SyAF) layer and an upper electrode are formed on an upper part of a capping layer. In addition, with regard to the STT-MRAM device, a silicon oxide film is formed on a silicon substrate, and then a seed layer and an MTJ are formed on an upper part thereof. In addition, a selection device, such as a transistor, may be formed on the silicon substrate, and a silicon oxide film may be formed to cover the selection device. Accordingly, the STT-MRAM device has a laminated structure including a silicon oxide film formed on a silicon substrate including a selection device thereon; a seed layer; a free layer; a tunnel barrier; a pinned layer; a capping layer; a synthetic antiferromagnetic layer; and an upper electrode. Here, the seed layer and the capping layer are formed using tantalum (Ta), and the synthetic antiferromagnetic layer has a structure wherein a lower magnetic layer, an upper magnetic layer, and a non-magnetic layer formed therebetween are included, i.e., magnetic metals and a non-magnetic metal are alternately laminated.
Currently reported MTJs are based on a SiO2 or MgO substrate, and do not include a lower electrode or mainly have a structure with a Ta/Ru lower electrode. To realize an STT-MRAM device, a capacitor having a 1T1C structure of a conventional DRAM should be replaced with an MTJ. Here, a lower electrode should be formed using a material capable of preventing resistance decrease in the transistor and diffusion of a metal. However, in the case of a conventional MTJ manufactured using a SiO2 or MgO substrate, it is impossible to apply the same to memory fabrication when considering coupling with an actual cell transistor.
In addition, in the case of a synthetic antiferromagnetic layer, a structure wherein a multilayered first magnetic layer, a non-magnetic layer, and a multilayered second magnetic layer are laminated is mainly used. Since each of the first and second magnetic layers is formed in a multilayered structure, the thickness of a fabricated memory device increases. In addition, since the first and second magnetic layers are generally made of a rare-earth metal, process costs thereof are high.
In addition, in a heat treatment process performed at 400° C. for a subsequent process of an MTJ of an STT-MRAM, a material of a synthetic antiferromagnetic layer is diffused into a tunnel barrier of the MTJ, whereby a bcc (100) crystalline structure may be deteriorated. Accordingly, a magnetization direction of the MTJ might not be rapidly changed, whereby operation speed of a memory may be decreased or the memory might not operate.
In addition, since a synthetic antiferromagnetic layer having an fcc (111) structure is formed on an upper part of an MTJ textured to a bcc (100) structure, the fcc (111) structure is diffused into the MTJ when the synthetic antiferromagnetic layer is formed, whereby the bcc (100) crystalline structure may be deteriorated. That is, when the synthetic antiferromagnetic layer is formed, a portion of the synthetic antiferromagnetic layer is diffused into the MTJ, whereby the crystallinity of the MTJ may be deteriorated. Accordingly, since a magnetization direction of the MTJ might not be rapidly changed, operation speed of a memory may be decreased or the memory might not operate.
In addition, a seed layer formed on an upper part of an amorphous silicon oxide film is formed of an amorphous material, whereby an MTJ is also formed of an amorphous material. Accordingly, crystallinity of the MTJ is deteriorated. That is, each of a pinned layer and a free layer is formed of amorphous CoFeB, whereby the crystallinity of the MTJ is not greatly improved although heat treatment is carried out to induce perpendicular anisotropy. When the crystallinity of the MTJ is low, PMA is decreased. Accordingly, although a magnetic field is applied to change a magnetization direction, the magnetization direction is not rapidly changed and the amount of current flowing in a parallel state is reduced. Accordingly, read/write time may be delayed, whereby it may be difficult to realize a high-speed memory device and read/write operation errors may occur.
To address the problems of CoFeB, CoFeAl or CoFeAlSi, a full-Heusler semimetal-based magnetic layer having superior characteristics to CoFeB may be applied to a pinned layer and a free layer. A spin polarization ratio of a CoFeB magnetic substance is theoretically 0.65, but a spin polarization ratio of CoFeAl or CoFeAlSi is 1. Accordingly, in the case of an MTJ using CoFeAl or CoFeAlSi, an infinite Tunneling Magneto-Resistance (TMR) ratio may be anticipated. In addition, since a damping coefficient of CoFeAl or CoFeAlSi is 0.001 although a damping coefficient of CoFeB is 0.005, consumption of switching current capable of changing an electron spin direction of a free layer is small.
However, when Ta is used as a seed layer, CoFeAl or CoFeAlSi does not exhibit perpendicular anisotropy. That is, since CoFeAl and CoFeAlSi are non-amorphous and crystalline, it is difficult to texturize CoFeAl or CoFeAlSi and MgO to a bcc (100) structure due to self-crystallization of an MgO tunnel barrier. In addition, to texturize CoFeAl or CoFeAlSi to a bcc (100) structure, a seed layer should be formed of Cr or Ru and a heat treatment process should be carried out at a high temperature of 700° C. or more.
Meanwhile, a metal line formation process and passivation process, which should be carried out after forming a synthetic antiferromagnetic layer and un upper electrode, are carried out at about 400° C. By the way, when Ta is used as a seed layer, PMA of an MTJ is deteriorated at about 400° C. Accordingly, thermal stability of PMA of the MTJ should be improved.
Further, to realize an STT-MRAM device, switching energy should be low enough to cope with a DRAM. However, there are difficulties in manufacturing a memory due to high energy used to spin a free layer.